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Trends and Issues in High Speed PCB-Level Signal and Power Integrity Analysis


Author(s):

Omer Tariq , IST

Keywords:

Crosstalk, Jitter, Signal Integrity, Power Integrity, Power Planes, Power Delivery Networks PDNs

Abstract:

The industrious evolution and convergence of digital computing have been driving semi-conductor technology to continue its fruition, following Moore’s law in today’s nanometer regime [1]. In modern high-speed and high-density digital designs, power distribution networks (PDNs) using power and ground plane are commonly used where decoupling capacitors are necessary to provide charge for logic transitions and, at the same time, to mitigate the noise and Electromagnetic interferences generated during device switching. Continuous increase the demands of higher data rates, reducing power consumption requirements while further compacting the design body, PDN design becomes increasingly challenging. Adding more filtering components may presents a seemingly unresolvable conflict with the industry trends for lower cost and design that is more compact. This paper discussed the general trends in Electromagnetic Compatibility analysis and critical issues of Signal and Power integrity to deal in high-speed PCB level designs. The simulation tool used in simulations is Hyper Lynx by Mentor Graphics.


Other Details:

Manuscript Id :IJSTEV7I1013
Published in :Volume : 7, Issue : 1
Publication Date: 01/08/2020
Page(s): 33-43
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