Mora- A Coarse Grained Reconfigurable Architecture
Author(s):
Pooja Naniwadekar , Sinhgad Institute of Technology and Science; Sayali Dhamale, Sinhgad Institute of Technology and Science; Vaishnavi Kokate, Sinhgad Institute of Technology and Science; Rohan Kubde, Sinhgad Institute of Technology and Science
Keywords:
MORA; CGRA; FPGA; ASIC; Reconfigurable Cells; Processing Element
Abstract:
This paper gives an overview of MORA architecture, a coarse grained reconfigurable processor for leading edge multimedia applications. MORA architecture is a 2-D array mesh based of such coarse grained reconfigurable processors. MORA asserts several advantages throughout the design cycle over traditional FPGA systems. The paper contains basic principles of coarse grained reconfigurable architectures (CGRAs) and the vast range of design options available to a CGRA designer, covering a large number of existing CGRA designs.
Other Details:
Manuscript Id | : | IJSTEV4I10092
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Published in | : | Volume : 4, Issue : 10
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Publication Date | : | 01/05/2018
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Page(s) | : | 258-261
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