A Review on Low Power Carry Select Adder
Author(s):
Manisha Singh , NIELIT Gorakhpur, India; Nishant Tripathi, NIELIT Gorakhpur, India
Keywords:
CSA, Low Power VLSI, RCA, CMOS
Abstract:
This paper presents a study on the low power high speed carry select adder. Carry select adder (CSA) is one of the fastest adders having less area and power consumption. It generates partial sum and carry by considering carry input Cin=0 and Cin=1, the accurate sum and carry are selected by the multiplexers. The carry-select adder (CSA) commonly consists of two ripple carry adders and a multiplexer. Adding two n-bit numbers with a carry-select adder is done with two adders (therefore two ripple carry adders) in order to perform the estimate twice, one time with the base of the carry being zero and the other assuming one.
Other Details:
| Manuscript Id | : | IJSTEV4I5026
|
| Published in | : | Volume : 4, Issue : 5
|
| Publication Date | : | 01/12/2017
|
| Page(s) | : | 83-86
|
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