Design and Analysis of Low Power High Speed Carry Select Adder using GDI Technique

Author(s):

Manisha Singh , NIELIT Gorakhpur, India; Nishant Tripathi, NIELIT Gorakhpur, India

Keywords:

CSA, Low Power VLSI, GDI, RCA

Abstract:

In this paper, GDI technique implementation of modified Carry Select Adder is presented for the low power applications. The proposed Carry Select Adder can be used RCA using GDI and same size of BEC (binary to excess-1) and Multiplexer. Simulation is performed in T-SPICE using 45nm technology parameters. The results have been compared with 16-bit Regular SQRT-CSA BK using BEC and proposed 16-bit CSA using GDI technique. The performance of the designs is compared in terms of area, power and delay. Comparative analysis shows that the proposed CSA using GDI technique has reduced area and consumes less power.

Other Details:

Manuscript Id	:	IJSTEV4I5014
Published in	:	Volume : 4, Issue : 5
Publication Date	:	01/12/2017
Page(s)	:	47-49

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