Deployment of Embedded Test Bench for Vehicular Delay Tolerant Network Using Firebird V and ARM Cortex A7

Saravanan P, Padmini K M; Padmini K M

CALL FOR PAPERS : Dec-2023

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25-Dec-23

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Deployment of Embedded Test Bench for Vehicular Delay Tolerant Network Using Firebird V and ARM Cortex A7

Author(s):

Saravanan P, Padmini K M , GAnadipathy Tulsi's Jain Engineering Colelge; Padmini K M, Ganadipathy Tulris Jain Engineering college

Keywords:

ARM Cortex A7, Atmega2560, DTN, Test Bench, VDTN, DTN, RSSI

Abstract:

Vehicular delay tolerant network is an opportunistic DTN network where there is no guaranteed communication channel for data communication between source and terminal nodes. It’s a delay tolerant network based on asynchronous communication. This paper primarily deals with the design and deployment of a test bed for VDTN in-order to evaluate the performance, locomotion of nodes, and time of live of data bundles under various combinations of circumstances like the scheduling and protocols used for VDTN routing. This prototypic embedded test-bench platform is comprises of robotic units with atmega2560 as mobile nodes, ARM Cortex as terminal nodes and atmega323 as relay nodes. The prototypic test-bench we proposed here tested with various routing protocol like single copy routing, first contact routing, epidemic routing protocol, Source & Binary spray and wait protocol, MaxProp routing protocol, Geospray routing protocol with various scheduling policies like pretty greedy, custom service time and the performance are evaluated.