High Performance Mac Design Using Vedic Multiplier and Reversible Logic Gate

Author(s):

Shraddha Wanjari , Nuva College of Engineering and Technology Nagpur, Maharashtra,India; Dr. Sanjay Asutkar, Manoharbhai Patel Institute of Engineering and Technology, Gondia, Maharashtra, India

Keywords:

Reversible Logic, Urdhava Triyagbhayam, Quantum Computing, Kogge Stone Adder, Gates

Abstract:

Multipliers are effective in many applications; the performance of system is directly proportional to throughput of the multiplier. The system depended throughput of multiplier and a system became slow therefore we need to design high performance multiplier. In this paper we implement The Vedic Multiplier and the Reversible Logic Gates and Accumulate Unit (MAC) Urdhava Triyagbhayam sutra for design of Vedic multiplier and the adder design is done by using reversible logic gate. Reversible logics are also the fundamental requirement for the emerging field of Quantum computing. The analyses result shows that our multiplier is faster than conventional multiplier and compares delay required for multiplier operation and also compare power and area of multiplier.

Other Details:

Manuscript Id	:	IJSTEV2I10142
Published in	:	Volume : 2, Issue : 10
Publication Date	:	01/05/2016
Page(s)	:	561-567

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