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Low Voltage and Low Power in Sram Read and Write Assist Techniques


Author(s):

Dipti Choudhary , Indraprastha Engineering College, Dr. APJ Abdul Kalam University, U.P., India; Vipul Bhatnagar, Indraprastha Engineering College, Dr. APJ Abdul Kalam University, U.P., India

Keywords:

Assist Techniques, Read Assist, SRAM Write Assist

Abstract:

This paper presents Read and Write assist techniques which are now commonly used, by minimizing the operating voltage i.e., Vmin of an SRAM cell. Basically read assist refers to retain the data when SRAM cell is at low voltage supply with reduced size. And write assist refers to write new data in the cell at low supply voltage with reduced size of transistor. Write failures (write-ability) or read failures (read-ability) are causing limitation to minimum supply voltage means minimizing the supply voltage causing hurdle in writing and reading a data. Write and Read failures are significantly affected by voltage optimization and SRAM 6T cell property is highly dependent on supply voltage. Various SRAM cells are designed which offers better resilience as compared to SRAM 6T cell. In this paper, various read and write assist techniques are discussed and compared. The major problem is faced during write assist at low voltage as the cell gets flipped and the data cannot be written. This effect gets more pronounced as the size of transistor is being reduced day by day as per consumer demand. As a result, it assists SRAM write operation with better performance and stability.


Other Details:

Manuscript Id :IJSTEV3I2045
Published in :Volume : 3, Issue : 2
Publication Date: 01/09/2016
Page(s): 118-126
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