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Low Overhead Internal Scrubbing Technique for Virtex-5 Configuration Upsets


Author(s):

PRASANTH C , SAINTGITS COLLEGE OF ENGINEERING, KOTTAYAM, KERALA, INDIA; RIBOY CHERIYAN, SAINTGITS COLLEGE OF ENGINEERING, KOTTAYAM, KERALA, INDIA

Keywords:

Configuration Memory, Reconfiguration, Scrubbing, Single Event Upsets

Abstract:

Field Programmable Gate Array is an innovative way of implementing hardware designs. Capability of customization after manufacturing of these devices allows to comply with new needs or to change an existing design. This has lead to their wide use in various sectors including safety critical applications and harsh radiation environments. But the main disadvantage of these devices is the susceptibly to radiation events. A radiation event can alter either the configuration memory or the user memory. An error in the configuration memory of an FPGA leads to a transient effect followed by a permanent effect. This may alter the implemented logic and can cause serious problems in mission critical applications. This paper presents a simple and fast method to correct single event upsets occurring in the configuration memory of Virtex-5 FPGAs. A Finite State Machine based controller is used for controlling the scrubbing process. A Syndrome decoder is used to locate the single bit error location inside a frame and they are corrected within a dual port BRAM. Internal Configuration Access Port is used to read the configuration frames and write the corrected frames back to the configuration memory. The system is implemented in Virtex-5 XC5VLX110T device and compared with the existing method for hardware utilization and the time to detect and correct single bit errors.


Other Details:

Manuscript Id :IJSTEV2I4087
Published in :Volume : 2, Issue : 4
Publication Date: 01/11/2015
Page(s): 295-302
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