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Design and Analysis of Double Gate MOSFET Operational Amplifier in 45nm CMOS Technology


Author(s):

Avinash Kadam , CPGS, Visvesvaraya Technological University, Belagavi; Dr. Meghana Kulkarni, CPGS, Visvesvaraya Technological University, Belagavi

Keywords:

Double Gate MOSFET, IDDG, SDDG, Tunable Gain, Op-Amp and Active Load

Abstract:

This paper describes the design and analysis of double gate operation amplifier (op-amp) using the two different biasing techniques of the double gate MOSFET. The double gate MOSFET is configured in Symmetrically Driven Double Gate (SDDG) & Independently Driven Double Gate (IDDG) configuration based on the biasing of the back gate. The op-amps are designed in 45nm technology in Cadence for analog application and analysed with active & passive load for gain and power dissipation as the key performance parameters. The two double gate configurations are compared to find the better topology. The IDDG op-amp with active load is found to be the better among the compared design with 27 dB gain and 157.8 uW of power dissipation. The gain of the IDDG based op-amps can be easily tuned by varying the back gate voltage, hence a better option of double gate topology that can be used in analog circuits.


Other Details:

Manuscript Id :IJSTEV2I12078
Published in :Volume : 2, Issue : 12
Publication Date: 01/07/2016
Page(s): 117-122
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