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AN EFFICIENT FPGA SIMULINK DESIGN BASED DCT TRANSFORM ARCHITECTURE FOR SIGNAL DENOISE APPLICATION


Author(s):

C.Kanagalakshmi , Christian College of Engineering & Technology Oddanchatram, Dindigul, Tamilnadu-624619, India; R.Shruthi Eshwari, Christian College of Engineering & Technology Oddanchatram, Dindigul, Tamilnadu-624619, India

Keywords:

Filter Processing Time, FTCDM Filter, XILINX, Discrete Cosine Transform, Latency Level

Abstract:

The communication industry field is mainly focused by high data transfer and more channel capacity in mobile communication. VLSI technology is used to modify any type digital based hardware architecture and to reduce the hardware system power, speed and complexity level. The filter process is mainly used to DSP and DIP real world application. The filter process is to remove the noise in original signal or image. So the filter architecture optimized process, to reduce the filter processing time and to increase the performance. Adaptive digital filters find wide application in several digital signal processing (DSP) areas. FIR filter architecture is used to effectively remove the noise in received channel data bits and to require less circuit complexity.The existing system frequency transformation based filters (FT filters) provide an absolute control over the cutoff frequency. However, the cutoff frequency range of the FT filters is limited. The second-order frequency transformations combined with coefficient decimation technique based filter (FTCDM filter) has wider range compared with the FT filter. But this method have some limitation. So we use the discrete cosine transform (DCT) modulation based low pass filter transformation process. Proposed system is to design a 18-band DCT transform signal denoising architecture simulink design. This simulink design is to consist the XILINX based digital architecture block. Discrete cosine transform (DCT) modulation are utilized to generate a uniform 18-band filter bank first, and then all elements of are replaced by all-pass filters to obtain a non-uniform filter bank. A fast recursive structure and variable-length algorithm is further developed to efficiently accomplish DCT modulation. Proposed system is to improve the output signal reconstruction effectively. Proposed system is to reduce the latency level and to increase the application system speed level.


Other Details:

Manuscript Id :IJSTEV2I10059
Published in :Volume : 2, Issue : 10
Publication Date: 01/05/2016
Page(s): 238-244
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